The Revision 2.0 schematic details a highly integrated architecture designed for mid-range portable computing: ⚡ Processor Support : Compatible with Intel Sky Lake-U and Kaby Lake-U CPUs. 🎮 Graphics (GPU)
Bridges the CPU/PCH to the Embedded Controller (EC) for low-speed communication. Power Rail Topology and Voltage Generation La-e791p Rev 2.0 Schematic Diagram
For the best results, use the LA-E791P Boardview file (.cad or .brd) alongside the PDF schematic. This allows you to physically locate the pins mentioned in the diagrams. The Revision 2
This board is a standard HP "Quanta" design, manufactured by the original design manufacturer (ODM) Compal for HP. This allows you to physically locate the pins
powers secondary controllers and USB subsystem standby circuits.
The schematic provides detailed maps of the board’s power rails and controller chips: EC (Embedded Controller) : Uses the ENE KB9022QD